1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display (LCD) device and a black matrix for a liquid crystal display device.
2. Discussion of the Related Art
Flat panel display devices have begun to replace cathode-ray tubes (CRTs) for information display. Various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission displays (FED), and electro-luminescence displays (ELDs) have been developed to replace CRTs. Of these types of flat panel displays, LCD devices have many advantages, such as high resolution, light weight, thin profile, compact size, and low voltage power supply requirements.
In general, an LCD device includes two substrates that are spaced apart and face each other with a liquid crystal material interposed between the two substrates. The two substrates include electrodes that face each other such that a voltage applied between the electrodes induces an electric field across the liquid crystal material. Alignment of the liquid crystal molecules in the liquid crystal material changes proportionally with the intensity of the induced electric field into the direction of the induced electric field, thereby changing the light transmissivity of the LCD device. Thus, the LCD device displays images by varying the intensity of the induced electric field.
FIG. 1 is a cross-sectional view illustrating an LCD device according to the related art.
As illustrated in FIG. 1, the LCD device “LCD” includes an array substrate “AS”, a color filter substrate “CS” and a liquid crystal layer 14.
The array substrate “AS” includes a first substrate 22 having a switching region “S”, a pixel region “P” and a storage region “C”, a thin film transistor “T” in the switching region “S” on the first substrate 22, a pixel electrode 17 in the pixel region “P”, a storage capacitor “Cst” in the storage region “C,” and gate and data lines 13 and 15 crossing each other to define the pixel region “P”. The thin film transistor “T” includes a gate electrode 32, a semiconductor pattern 34, a source electrode 36 and a drain electrode 38. A passivation layer 40 is disposed on the thin film transistor “T”. A storage capacitor “Cst” includes the gate line 13 and a storage electrode 30 overlapping the gate line 13.
The color filter substrate “CS” includes a second substrate 5, and a black matrix 6 corresponding to a gate line 13, a data line 15, and a thin film transistor T on the second substrate 5. The color filter substrate “CS” further includes red (R), green (G) and blue (B) color filter patterns 7a, 7b and 7c corresponding to the respective pixel regions P, and a common electrode 18 on the black matrix 6 and the color filter patterns 7a, 7b and 7c. 
The above-described array substrate and the color filter substrate are aligned to each other and then attached. Once attached, there is a possibility of light leakage in the LCD device due to a misalignment between the two substrates. Accordingly, the black matrix has a margin of error to compensate for misalignment whereby the area of the black matrix is increased. However, an aperture ratio of the LCD device is reduced by a margin of error for the black matrix.
To improve the light leakage and the aperture ratio, a color filter on transistor (COT) type LCD device is used.
FIG. 2 is a cross-sectional view illustrating a COT type LCD device according to the related art.
As illustrated in FIG. 2, the COT type LCD device “LC” includes first and second substrates 50 and 90 attached by a sealant 80. A gate line 52 and a data line (not shown) cross each other to define a pixel region “P” on the first substrate 50. A thin film transistor “T” includes a gate electrode 53 on the first substrate 50, a gate insulating layer 56 on the gate electrode 53, a semiconductor pattern 58 on the gate insulating layer 56, and source and drain electrodes 60 and 62 on the semiconductor pattern 58. A gate pad electrode 54 and a gate pad electrode terminal 78 are disposed at one end of the gate line 52. A passivation layer 70 is disposed on the first substrate 50 having the thin film transistor “T”.
Color filter patterns 72a and 72b and a black matrix “BM” are disposed on a passivation layer 70. The color filter patterns 72a and 72b includes a red (R) color filter pattern 72a, a green (G) color filter pattern 72b and a blue color filter pattern (not shown) correspond to the respective pixel region “P”, and the black matrix “BM” corresponds to the thin film transistor “T”. A planarization layer 74 is disposed on the first substrate 50 having the color filter patterns 72a and 72b and the black matrix “BM.”
A pixel electrode 76 is disposed on the planarization layer 74 corresponding to the pixel region “P”. The pixel electrode 76 and the gate pad electrode terminal 78 are made of a transparent conductive material.
A light shielding pattern 92 is disposed at peripheral portions of the second substrate 90, and a common electrode 94 is disposed on the second substrate 70 to induce a vertical electric field with the pixel electrode 76.
As described above, the color filter patterns and the thin film transistor are formed on the same substrate. Accordingly, a margin of error to compensate for misalignment during attachment of the first and second substrates is not required.
The related art black matrix corresponds to the thin film transistor, and thus it shields light otherwise incident on the semiconductor pattern of the thin film transistor. Further, the related art black matrix corresponds to the gate and data lines, and thus it shields light reflected from the gate and data lines and prevents a light leakage between the pixel electrodes and the gate and data lines. To do this, the related art black matrix is made of a black resin including carbon particles. A carbon particle has light absorbing characteristics. Accordingly, the light-shielding ability of the black matrix depends upon the density of carbon particles.
However, since the related art black matrix uses a carbon particle, it does not shield signal interferences between the thin film transistor, the gate line or the data line, which cause a parasitic capacitance with the thin film transistor, the gate line or the data line. This parasitic capacitance causes signal delay, which prevents the pixel electrode 76 from being properly charged for the purposes of generating an electric field.
FIG. 3 is a picture showing a screen of a related art COT type LCD device having a black matrix including carbon particles, and FIG. 4 is a waveform showing an input signal and an output signal of the related art COT type LCD device.
As illustrated in FIG. 3, upper portions of the screen are near to driving circuits supplying data signals. An input signal from the driving circuits is delayed along a downward direction, and thus pixel electrodes of the lower portions are not charged sufficiently. Accordingly, the upper portions are distinct, and lower portions get dimmer along a downward direction. As illustrated in FIG. 4, an input signal “W1” from the driving circuits is deformed into an output signal “W2” due to signal delay in the related art LCD device. As a result, a display quality of the related art LCD device is degraded.